This is a project proposal combining the expertise of the crypto group with the expertise of the group of Daniel Gruss.
Various approaches to prevent microarchitectural attacks can benefit from data/address scrambling schemes. One example is the recent introduction of the cipher Qarma by ARM to enforce code-flow integrity.
The goal of this project is to apply such approaches to many more potential cases for countering any kind of microarchitectural side-channel attacks. For this, it is necessary to do the following for every such case:
(1) Study which concrete requirements for the scrambling scheme can be deduced. This includes differential properties, algebraic properties, or other mixing properties.
(2) Study which performance requirements and important metrics are relevant for the case. This may be latency, chip area, energy consumption, etc, or a combination of these.
(3) Design such a scrambling scheme based on existing knowledge of lightweight symmetric crypto design.
(4) Analyze various attack vectors relevant to that use-case
(5) Implement scrambling scheme and (ideally) this is then incorporated in actual CPU designs.
Taiga RIG Inventory project here